Project must be done on Cadence with model files attached and rules files Projec Leave a reply Project must be done on Cadence with model files attached and rules files Project 4 Design of BCD Up/Down Counter You are to design a 4-bit BCD up/down counter. Depending upon the value of the up/down bit, the circuit follows one of the two count sequences, respectively. 0000-0001-0010-0011-0100-0101-0110-0111-1000-1001-0000 Or 1001-1000-0111-0110-0101-0100-0011-0010-0001-0000-1001 There is no requirement for the starting value. 1. Design the circuit (schematic and layout). Hint (this is just a hint, you have freedom to use any flip-flops or circuit architecture): A. First design a J-K flip-flop with Reset (verify both schematic and layout, show waveforms and LVS) B. Cascade multiple J-K flip-flops (both in schematic and layout) with other gates to obtain 4-bit BCD up-down counter (verify both schematic and layout, show waveforms and LVS) You can first try the up-counter then extend/modify the circuit and layout for up-down counter. 2. Simulate the layout and plot each of the four F/F outputs and the clock input for both cases; when the counter is counting up and when it is counting down. 3. In your report, include schematics, layouts (of a single J-K flip flop as well as full counter circuit). Show complete LVS report. Show waveforms of J-K flip flop operation along with its truth table. Show waveforms confirming the up and down counting operation. This entry was posted in Engineering on December 7, 2021 by .
